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ds07-12513-3e fujitsu semiconductor data sheet 8-bit proprietary microcontroller cmos f 2 mc-8l mb89820 series mb89821/823/p825/pv820 n description mb89820 series is a line of single-chip microcontrollers using the f 2 mc-8l* cpu core which can operate at low voltage but at high speed. in addition to an lcd controller/driver allowing 200-pixel display the microcontrollers contain a variety of peripheral functions such as timers, a uart, a serial interface, and an external interrupt. the configuration of the mb89820 series is therefore best suited to control of lcd display panels. *: f 2 mc stands for fujitsu flexible microcontroller. n features ? minimum execution time: 0.8 m s/5 mhz (v cc = +5.0 v) ?f 2 mc-8l family cpu core multiplication and division instructions 16-bit arithmetic operations test and branch instructions bit manipulation instructions, etc. ? lcd controller/driver max. 50 segments 4 commons divided resistor for lcd power supply (continued) n packages instruction set optimized for controllers 80-pin plastic qfp 80-pin ceramic mqfp (fpt-80p-m11) (mqp-80c-p01)
2 mb89820 series (continued) ? three types of timers 8-bit pwm timer (also usable as a reload timer) 8-bit pulse width count timer (also usable as a reload timer) 20-bit time-base timer ? two serial interfaces 8-bit synchronous serial interface (switchable transfer direction allows communication with various equipment.) uart (5-, 7-, 8-bit transfer capable) ? external interrupt: 2 channels capable of wake-up from low-power consumption modes (with an edge detection function) ? low-power consumption modes stop mode (oscillation stops to minimize the current consumption.) sleep mode (the cpu stops to reduce the current consumption to approx. 1/3 of normal.) n product lineup (continued) mb89823 MB89P825 mb89pv820 classification mass production product (mask rom products) one-time prom product piggyback/evaluation product for evaluation and development rom size 4 k 8 bits (internal mask rom) 8 k 8 bits (internal mask rom) 16 k 8 bits (internal prom, programming with general-purpose eprom programmer) 32 k 8 bits (external rom) ram size 128 8 bits 256 8 bits 1024 8 bits cpu functions number of instructions: 136 instruction bit length: 8 bits instruction length: 1 to 3 bytes data bit length: 1, 8, 16 bits minimum execution time: 0.8 m s/5 mhz (v cc = 5.0 v) interrupt processing time: 7.2 m s/5 mhz (v cc = 5.0 v) por ts i/o ports (n-ch open-drain): 16 (all also serve as segment pins.) *1 i/o ports (n-ch open-drain): 6 i/o ports (cmos): 6 (5 ports also serve as peripheral i/o.) input ports: 4 (1 port also serves as an external interrupt input.) total: 32 (max.) 8-bit pwm timer 8-bit reload timer operation (toggled output capable) 8-bit resolution pwm operation operating clock (pulse width count timer output: 0.8 m s, 12.8 m s, 51.2 m s/5 mhz) 8-bit pulse width count timer 8-bit reload timer operation 8-bit pulse width count operation (continuous measurement capable h width, l width, or single-cycle measurement capable) operating clock (0.8 m s, 3.2 m s, 25.6 m s/5 mhz) 8-bit serial i/o 8 bits one clock selectable from four transfer clocks (one external shift clock, three internal shift clock, three internal shift clocks: 1.6 m s, 6.4 m s, 25.6 m s/5 mhz) lsb first/msb first selectability mb89821 part number parameter
3 mb89820 series (continued) *1: the function is selected by the mask option. *2: varies with conditions such as the operating frequency. (see section n electrical characteristics.) *3: the operation at less than 2.2 v is assured separately. please contact fujitsu limited. n package and corresponding products : available : not available note: for more information about each package, see section n package dimensions. mb89823 MB89P825 mb89pv820 uart 5-, 7-, 8-bit transfer capable internal baud-rate generator (max. 78125 bps/5 mhz) lcd controller/ driver common output: 4 segment output: 50 (max.) operating mode: 1/2 bias, 1/2 duty; 1/3 bias, 1/3 duty; 1/3 bias, 1/4 duty lcd display ram size: 50 4 bits dividing resistor for lcd driving: built-in (an external resistor selectable) external interrupt 2 channels (edge selectable) (1 channel also serves as a pulse width count timer input) standby mode sleep mode, stop mode process cmos operating voltage *2 2.2 v *3 to 6.0 v 2.7 v to 6.0 v eprom for use mbm27c256a-20tv (lcc package) package mb89821 mb89823 MB89P825 mb89pv820 fpt-80p-m11 mqp-80c-p01 mb89821 part number parameter
4 mb89820 series n differences among products 1. memory size before evaluating using the piggyback product, verify its differences from the product that will actually be used. take particular care on the following points: ? on the mb89821, the register bank address upper than 0140 h cannot be used. on the mb89823 and MB89P825, each register bank addresses upper than 0180 h can be used. ? on the MB89P825, addresses bff0 h to bff6 h comprise the option setting area, option settings can be read by reading these addresses. ? the stack area, etc., is set at the upper limit of the ram. 2. current consumption ? in the case of the mb89pv820, add the current consumed by the eprom which is connected to the top socket. ? however, the current consumption in sleep/stop modes is the same. (for more information, see section n electrical characteristics. 3. mask options functions that can be selected as options and how to designate these options vary by the product. before using options check section n mask options. take particular care on the following point: ? options are fixed on the mb89pv820.
5 mb89820 series n pin assignment 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 v ss x1 x0 rst mod1 mod0 p45/sck p44/so p43/si p42/pwc/int1 p41/pwm p40 p33 p32 p31 p30/int0 p25 p24 p23 p22 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 seg13 seg14 seg15 seg16 seg17 seg18 seg19 seg20 seg21 seg22 seg23 seg24 seg25 seg26 seg27 seg28 seg29 seg30 seg31 seg32 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 v1 v2 v3 com0 com1 com2 com3 seg0 seg1 seg2 seg3 seg4 seg5 seg6 seg7 seg8 seg9 seg10 seg11 seg12 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 p21 p20 v cc p17/seg49 p16/seg48 p15/seg47 p14/seg46 p13/seg45 p12/seg44 p11/seg43 a10/seg42 p07/seg41 p06/seg40 p05/seg39 p04/seg38 p03/seg37 p02/seg36 p01/seg35 p00/seg34 seg33 (fpt-80p-m11) (top view)
6 mb89820 series ? pin assignment on package top (mb89pv820 only) n.c.: internally connected. do not use. pin no. pin name pin no. pin name pin no. pin name pin no. pin name 81 n.c. 89 a2 97 n.c. 105 oe 82 v pp 90 a1 98 o4 106 n.c. 83 a12 91 a0 99 o5 107 a11 84 a7 92 n.c. 100 o6 108 a9 85 a6 93 o1 101 o7 109 a8 86 a5 94 o2 102 o8 110 a13 87 a4 95 o3 103 ce 111 a14 88 a3 96 v ss 104 a10 112 v cc 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 seg4 seg3 seg2 seg1 seg0 com3 com2 com1 com0 v3 v2 v1 x1 x0 v ss rst mod1 mod0 p45/sck p44/so p43/si p42/pwc/int1 p41/pwm p40 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 seg21 seg22 seg23 seg24 seg25 seg26 seg27 seg28 seg29 v cc seg30 seg31 seg32 seg33 p00/seg34 p01/seg35 p02/seg36 p03/seg37 p04/seg38 p05/seg39 p06/seg40 p07/seg41 p10/seg42 p11/seg43 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 seg5 seg6 seg7 seg8 seg9 seg10 seg11 seg12 seg13 seg14 seg15 seg16 seg17 seg18 seg19 seg20 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 p33 p32 p31 p30/int0 p25 p24 p23 p22 p21 p20 p17/seg49 p16/seg48 p15/seg47 p14/seg46 p13/seg45 p12/seg44 101 102 103 104 105 106 107 108 109 93 92 91 90 89 88 87 86 85 100 99 98 97 96 95 94 110 111 112 81 82 83 84 (top view) (mqp-80c-p01) each pin inside the dashed line is for the mb89pv820 only.
7 mb89820 series n pin description (continued) *1: fpt-80p-m11 *2: mqp-80c-p01 pin no. pin name circuit type function qfp *1 mqfp *2 3 14 x0 a clock crystal oscillator pins 213x1 6 18 mod0 b operating mode selection pins connect directly to v ss . 517mod1 416rst c reset i/o pin this pin is an n-ch open-drain type with a pull-up resistor, and a hysteresis input type. l is output from this pin by an internal reset source (optional function). the internal circuit is initialized by the input of l. 39 to 32 50 to 43 p00/seg34 to p07/seg41 d general-purpose n-ch open-drain i/o ports also serve as an lcd controller/driver segment output. the port and segment output are switched by mask option in 8-bit unit. 31 to 24 42 to 35 p10/seg42 to p17/seg49 d general-purpose n-ch open-drain i/o ports also serve as an lcd controller/driver segment output. the port and segment output are switched by mask option in 4 to 1-bit unit. 22 to 17 34 to 29 p20 to p25 f general-purpose n-ch open-drain i/o ports a pull-up resistor option is provided. 16 28 p30/int0 h general-purpose input port the input is hysteresis input. also serves as an external interrupt input (int0). a pull-up resistor option is provided. 15 to 13 27 to 25 p31 to p33 h general-purpose input ports these pins are a hysteresis input type. a pull-up resistor option is provided. 12 24 p40 e general-purpose i/o port a pull-up resistor option is provided. 11 23 p41/pwm e general-purpose i/o port a pull-up resistor option is provided. also serves as an 8-bit pwm timer toggle output (pwm). 10 22 p42/pwc/int1 e general-purpose i/o port a pull-up resistor option is provided. also serves as an 8-bit pulse width count timer input (pwc) and an external interrupt input (int1). the pwc and int1 input is hysteresis input. 9 21 p43/si e general-purpose i/o port a pull-up resistor option is provided. also serves as an 8-bit serial i/o and a uart data input (si). the si input is hysteresis input.
8 mb89820 series (continued) *1: fpt-80p-m11 *2: mqp-80c-p01 pin no. pin name circuit type function qfp *1 mqfp *2 8 20 p44/so e general-purpose i/o port a pull-up resistor option is provided. also serves as a serial i/o and a uart data output (so). 7 19 p45/sck e general-purpose i/o port a pull-up resistor option is provided. also serves as a serial i/o and a uart clock i/o (sck). the sck input is hysteresis input. 73 to 40 5 to 1, 80 to 56, 54 to 51 seg0 to seg33 g lcd controller/driver segment output pins 77 to 74 9 to 6 com0 to com3 g lcd controller/driver common output pins 80 to 78 12 to 10 v1 to v3 lcd driving power supply pins 23 55 v cc power supply pin 115v ss power supply (gnd) pin
9 mb89820 series ? external eprom pins (mb89pv820 only) pin no. pin name i/o function 82 v pp o h level output pin 83 84 85 86 87 88 89 90 91 a12 a7 a6 a5 a4 a3 a2 a1 a0 o address output pins 93 94 95 o1 o2 o3 i data input pins 96 v ss o power supply (gnd) pin 98 99 100 101 102 o4 o5 o6 o7 o8 i data input pins 103 ce o rom chip enable pin outputs h during standby. 104 a10 o address output pin 105 oe o rom output enable pin outputs l at all times. 107 108 109 a11 a9 a8 o address output pins 110 a13 o 111 a14 o 112 v cc o eprom power supply pin 81 92 97 106 n.c. internally connected pins be sure to leave them open.
10 mb89820 series n i/o circuit type (continued) type circuit remarks a ? crystal oscillator circuit ? at an oscillation feedback resistor of approximately 1 m w /5.0 v b c ? at an output pull-up resistor (p-ch) of approximately 50 k w /5.0 v ? hysteresis input d ? n-ch open-drain output ? cmos input ? segment output optional e ? cmos output ? cmos input ? hysteresis input (peripheral input) ? pull-up resistor optional x1 x0 standby control signal r p-ch n-ch p-ch n-ch p-ch n-ch n-ch port p-ch n-ch r p-ch peripheral port
11 mb89820 series (continued) type circuit remarks f ? n-ch open-drain output ? cmos input ? pull-up resistor optional g ? lcd controller/driver h ? hysteresis input ? pull-up resistor optional n-ch r p-ch p-ch n-ch p-ch n-ch r
12 mb89820 series n handling devices 1. preventing latchup latchup may occur on cmos ics if voltage higher than v cc or lower than v ss is applied to input and output pins other than medium- to high-voltage pins or if higher than the voltage which shows on 1. absolute maximum ratings in section n electrical characteristics is applied between v cc and v ss . when latchup occurs, power supply current increases rapidly and might thermally damage elements. when using, take great care not to exceed the absolute maximum ratings. also, take care to prevent the analog power supply (av cc and avr) and analog input from exceeding the digital power supply (v cc ) when the analog system power supply is turned on and off. 2. treatment of unused input pins leaving unused input pins open could cause malfunctions. they should be connected to a pull-up or pull-down resistor. 3. treatment of power supply pins on microcontrollers with a/d and d/a converters connect to be av cc = davc = v cc and av ss = avr = v ss even if the a/d and d/a converters are not in use. 4. treatment of n.c. pins be sure to leave (internally connected) n.c. pins open. 5. power supply voltage fluctuations although v cc power supply voltage is assured to operate within the rated range, a rapid fluctuation of the voltage could cause malfunctions, even if it occurs within the rated range. stabilizing voltage supplied to the ic is therefore important. as stabilization guidelines, it is recommended to control power so that v cc ripple fluctuations (p-p value) will be less than 10% of the standard v cc value at the commercial frequency (50 to 60 hz) and the transient fluctuation rate will be less than 0.1 v/ms at the time of a momentary fluctuation such as when power is switched. 6. precautions when using an external clock even when an external clock is used, oscillation stabilization time is required for power-on reset (optional) and wake-up from stop mode.
13 mb89820 series n programming to the eprom on the MB89P825 the MB89P825 is an otprom (one-time prom) version for the mb89820 series. 1. features ? 16-kbyte prom on chip ? options can be set using the eprom programmer. ? equivalency to the mbm27c256a in eprom mode (when programmed with the eprom programmer) 2. memory space memory space in eprom mode is diagrammed below. 3. programming to the eprom in eprom mode, the MB89P825 functions equivalent to the mbm27c256a. this allows the prom to be programmed with a general-purpose eprom programmer (the electronic signature mode cannot be used) by using the dedicated socket adapter. ? programming procedure (1) set the eprom programmer to the mbm27c256a. (2) load program data into the eprom programmer at 4000 h to 7fff h (note that addresses c000 h to ffff h while operating as a single chip assign to 4000 h to 7fff h in eprom mode). load option data into addresses 3ff0 h to 3ff5 h of the eprom programmer. (for information about each corresponding option, see 7. otprom option bit map. (3) program with the eprom programmer. address 0000 h 0080 h 0180 h c000 h ffff h i/o prom 16 kb ram bff6 h bff0 h 8000 h not available not available not available option area eprom mode (corresponding addresses on eprom programmer) 4000 h 7fff h eprom 16 kb 3ff6 h 3ff0 h 0000 h vacancy (read value ff h ) vacancy (read value ff h ) option area single chip
14 mb89820 series 4. recommended screening conditions high-temperature aging is recommended as the pre-assembly screening procedure for a product for a product with a blanked otprom microcomputer program. 5. programming yield all bits cannot be programmed at fujitsu shipping test to a blanked otprom microcomputer, due to its nature. for this reason, a programming yield of 100% cannot be assured at all times. 6. eprom programmer socket adapter inquiry: sun hayato co., ltd.: tel 81-3-3802-5760 package compatible socket adapter fpt-80p-m11 rom-80qf2-28dp-8l3 program, verify aging +150?, 48 hrs. data verification assembly
15 mb89820 series 7. otprom option bit map notes: set each bit to 1 to erase. do not write 0 to the vacant bit. the read value of the vacant bit is 1, unless 0 is written to it. bit 7bit 6bit 5bit 4bit 3bit 2bit 1bit 0 3ff0 h vacancy readable vacancy readable vacancy readable vacancy readable vacancy readable reset pin output 1: yes 0: no oscillation stabilization time 1: 2 17 /f c 0: 2 13 /f c power-on reset 1: yes 0: no 3ff1 h vacancy readable vacancy readable vacancy readable vacancy readable vacancy readable vacancy readable vacancy readable vacancy readable 3ff2 h vacancy readable vacancy readable vacancy readable vacancy readable vacancy readable vacancy readable vacancy readable vacancy readable 3ff3 h vacancy readable vacancy readable p25 pull-up 1: no 0: yes p24 pull-up 1: no 0: yes p23 pull-up 1: no 0: yes p22 pull-up 1: no 0: yes p21 pull-up 1: no 0: yes p20 pull-up 1: no 0: yes 3ff4 h vacancy readable vacancy readable p45 pull-up 1: no 0: yes p44 pull-up 1: no 0: yes p43 pull-up 1: no 0: yes p42 pull-up 1: no 0: yes p41 pull-up 1: no 0: yes p40 pull-up 1: no 0: yes 3ff5 h vacancy readable vacancy readable vacancy readable vacancy readable p33 pull-up 1: no 0: yes p32 pull-up 1: no 0: yes p31 pull-up 1: no 0: yes p30 pull-up 1: no 0: yes
16 mb89820 series n programming to the eprom with piggyback/evaluation device 1. eprom for use mbm27c256a-20tv 2. programming socket adapter to program to the prom using an eprom programmer, use the socket adapter (manufacturer: sun hayato co., ltd.) listed below. inquiry: sun hayato co., ltd.: tel 81-3-3802-5760 3. memory space memory space in each mode, such as 32 kbyte prom, option area is diagrammed below. 4. programming to the eprom (1) set the eprom programmer to the mbm27c256a. (2) load program data into the eprom programmer at 0000 h to 7fff h . (3) program to 0000 h to 7fff h with the eprom programmer. package adapter socket part number lcc-32 (rectangle) rom-32lc-28dp-yg 0000 h 0080 h 0480 h 8000 h ffff h i/o ram not available prom 32 kb eprom 32 kb 0000 h 7fff h single chip corresponding addresses in eprom programmer address
17 mb89820 series n block diagram 6 p20 to p25 8 rst x0 x1 uart oscillator clock controller reset circuit (wdt) 20-bit time-base timer port 2 n-ch open-drain i/o port 8-bit pwm timer 8-bit pulse width timer/ counter 8-bit serial i/o cmos i/o port external interrupt lcd controller/driver mod0, mod1, v cc , v ss port 3 other pins external interrupt noise cancel- lation n-ch open-drain i/o port 3 p30/int0 p31 to p33 p41/pwm p42/pwc/int1 p45/sck p44/so p43/si p40 p00/seg34 to p07/seg41 p10/seg42 to p17/seg49 seg0 to seg33 com0 to com3 v1 to v3 8 34 4 3 16 internal bus port 4 port 0 and port 1 i/o port rom f 2 mc-8l cpu ram
18 mb89820 series n cpu core 1. memory space the microcontrollers of the mb89820 series offer a memory space of 64 kbytes for storing all of i/o, data, and program areas. the i/o area is located at the lowest address. the data area is provided immediately above the i/o area. the data area can be divided into register, stack, and direct areas according to the application. the program area is located at exactly the opposite end, that is, near the highest address. provide the tables of interrupt reset vectors and vector call instructions toward the highest address within the program area. the memory space of the mb89820 series is structured as illustrated below. rom 4 kb ram ffff h 0080 h 0000 h register i/o mb89821 unused vacancy f000 h 00c0 h 0100 h 0140 h mb89823 MB89P825 mb89pv820 rom 8 kb ram ffff h 0080 h 0000 h register i/o unused e000 h 0100 h 0180 h prom 16 kb ram ffff h 0080 h 0000 h register i/o unused c000 h 0100 h 0180 h external rom 32 kb ram ffff h 0080 h 0000 h register i/o unused 0100 h 0200 h 0480 h 8000 h 192 b 256 b 256 b 1 kb memory space
19 mb89820 series 2. registers the f 2 mc-8l family has two types of registers; dedicated registers in the cpu and general-purpose registers in the memory. the following dedicated registers are provided: program counter (pc): a 16-bit register for indicating instruction storage positions accumulator (a): a 16-bit temporary register for storing arithmetic operations, etc. when the instruction is an 8-bit data processing instruction, the lower byte is used. temporary accumulator (t): a 16-bit register which performs arithmetic operations with the accumulator when the instruction is an 8-bit data processing instruction, the lower byte is used. index register (ix): a 16-bit register for index modification extra pointer (ep): a 16-bit pointer for indicating a memory address stack pointer (sp): a 16-bit register for indicating a stack area program status (ps): a 16-bit register for storing a register pointer, a condition code the ps can further be divided into higher 8 bits for use as a register bank pointer (rp) and the lower 8 bits for use as a condition code register (ccr). (see the diagram below.) pc a t ix ep sp ps 16 bits : program counter : accumulator : temporary accumulator : index register : extra pointer : stack pointer : program status fffd h undefined undefined undefined undefined undefined i-flag = 0, il1, il0 = 11 other bits are undefined. initial value structure of the program status register vacancy vacancy vacancy h i il1, 0 n z vc 54 rp ps 109876 3210 15 14 13 12 11 rp ccr
20 mb89820 series the rp indicates the address of the register bank currently in use. the relationship between the pointer contents and the actual address is based on the conversion rule illustrated below. the ccr consists of bits indicating the results of arithmetic operations and the contents of transfer data and bits for control of cpu operations at the time of an interrupt. h-flag: set when a carry or a borrow from bit 3 to bit 4 occurs as a result of an arithmetic operation. cleared otherwise. this flag is for decimal adjustment instructions. i-flag: interrupt is allowed when this flag is set to 1. interrupt is prohibited when the flag is set to 0. set to 0 when reset. il1, 0: indicates the level of the interrupt currently allowed. processes an interrupt only if its request level is higher than the value indicated by this bit. n-flag: set if the msb is set to 1 as the result of an arithmetic operation. cleared when the bit is set to 0. z-flag: set when an arithmetic operation results in 0. cleared otherwise. v-flag: set if the complement on 2 overflows as a result of an arithmetic operation. reset if the overflow does not occur. c-flag: set when a carry or a borrow from bit 7 occurs as a result of an arithmetic operation. cleared otherwise. set to the shift-out value in the case of a shift instruction. il1 il0 interrupt level high-low 00 1 high low = no interrupt 01 10 2 11 3 rule for conversion of actual addresses of the general-purpose register area ? a15 ? a14 ? a13 ? a12 ? a11 ? a10 ? a9 ? a8 r4 a7 r3 a6 r2 a5 r1 a4 r0 a3 b2 a2 b1 a1 b0 a0 lower op codes rp generated addresses
21 mb89820 series the following general-purpose registers are provided: general-purpose registers: an 8-bit register for storing data the general-purpose registers are 8 bits and located in the register banks of the memory. one bank contains eight registers and up to a total of 16 banks can be used on the mb89823 (ram 256 8 bits). the bank currently in use is indicated by the register bank pointer (rp). note: the number of register banks that can be used varies with the ram size. mb89821 0100 h to 013f h 8 banks mb89823 0100 h to 017f h 16 banks MB89P825 0100 h to 017f h 16 banks mb89pv820 0100 h to 01ff h 32 banks this address = 0100 h + 8 (rp) memory area 16 banks r 0 r 1 r 2 r 3 r 4 r 5 r 6 r 7 register bank configuration
22 mb89820 series n i/o map (continued) address read/write register name register description 00 h (r/w) pdr0 port 0 data register 01 h vacancy 02 h (r/w) pdr1 port 1 data register 03 h vacancy 04 h (r/w) pdr2 port 2 data register 05 h vacancy 06 h vacancy 07 h vacancy 08 h (r/w) stbc standby control register 09 h (r/w) wdtc watchdog timer control register 0a h (r/w) tbcr time-base timer control register 0b h vacancy 0c h (r) pdr3 port 3 data register 0d h vacancy 0e h (r/w) pdr4 port 4 data register 0f h (w) ddr4 port 4 data direction register 10 h vacancy 11 h vacancy 12 h (r/w) cntr pwm timer control register 13 h (w) comr pwm timer compare register 14 h (r/w) pcr1 pwc pulse width control register 1 15 h (r/w) pcr2 pwc pulse width control register 2 16 h (r/w) rlbr pwc reload buffer register 17 h (r/w) nccr pwc noise cancellation control register 18 h vacancy 19 h vacancy 1a h vacancy 1b h vacancy 1c h (r/w) smr serial mode register 1d h (r/w) sdr serial data register 1e h vacancy 1f h vacancy
23 mb89820 series (continued) note: do not use vacancies. address read/write register name register description 20 h (r/w) smc1 uart serial mode control register 1 21 h (r/w) src uart serial rate control register 22 h (r/w) ssd uart serial status/data register 23 h (r/w) sidr/sodr uart serial data register 24 h (r/w) smc2 uart serial mode control register 2 25 h vacancy 26 h vacancy 27 h vacancy 28 h vacancy 29 h vacancy 2a h vacancy 2b h vacancy 2c h vacancy 2d h vacancy 2e h vacancy 2f h vacancy 30 h (r/w) eic1 external interrupt 1 control register 31 h to 5f h vacancy 60 h to 78 h (r/w) vram display data ram 79 h (r/w) lcr1 lcd controller/driver control register 7a h (r/w) segr segment output selection register 7b h vacancy 7c h (w) ilr1 interrupt level setting register 1 7d h (w) ilr2 interrupt level setting register 2 7e h (w) ilr3 interrupt level setting register 3 7f h vacancy
24 mb89820 series n electrical characteristics 1. absolute maximum ratings (v ss = 0.0 v) precautions: permanent device damage may occur if the above absolute maximum ratings are exceeded. functional operation should be restricted to the conditions as detailed in the operational sections of this data sheet. exposure to absolute maximum rating conditions for extended periods may affect device reliability. parameter symbol value unit remarks min. max. power supply voltage v cc v ss C 0.3 v ss + 7.0 v lcd power supply voltage v3 v ss C 0.3 v ss + 7.0 v v3 pin input voltage v i1 v ss C 0.3 v cc + 0.3 v v i1 must not exceed v ss + 7.0 v. except p00 to p07 and p10 to p17 for the MB89P825/pv820, and p20 to p25 without a pull-up resistor v i2 v ss C 0.3 v ss + 7.0 v p00 to p07 and p10 to p17 (when selected as ports) for the mb89821/ 823, and p20 to p25 without a pull- up resistor v i3 v ss C 0.3 v3 + 0.3 v p00 to p07 and p10 to p17 for the MB89P825/pv820 output voltage v o1 v ss C 0.3 v cc + 0.3 v v o1 must not exceed v ss + 7.0 v. except p00 to p07 and p10 to p17 for the MB89P825/pv820, and p20 to p25 without a pull-up resistor v o2 v ss C 0.3 v ss + 7.0 v p00 to p07 and p10 to p17 (when selected as ports) for the mb89821/ 823, and p20 to p25 without a pull- up resistor v o3 v ss C 0.3 v3 + 0.3 v p00 to p07 and p10 to p17 for the MB89P825/pv820 l level output current i ol 10 ma except power supply pins l level average output current i olav 4ma average value (operating current operating rate) except power supply pins total l level output current s i ol 40ma h level output current i oh C5 ma except power supply pins h level average output current i ohav C2ma average value (operating current operating rate) except power supply pins total h level output current s i oh C10 ma power consumption p d 300 mw operating temperature t a C40 +85 c storage temperature tstg C55 +150 c
25 mb89820 series 2. recommended operating conditions (v ss = 0.0 v) * : the minimum operating power supply voltage varies with the operating frequency. figure 1 operating voltage vs. clock operating frequency figure 1 indicates the operating frequency of the external oscillator at an instruction cycle of 4/f c . parameter symbol value unit remarks min. max. power supply voltage v cc 2.2* 6.0* v normal operation assurance range* 1.5 6.0 v retains the ram state in stop mode lcd power supply voltage v3 v ss 6.0 v v3 pin lcd power supply range. the optimum value is dependent on the element in use. operating temperature t a C40 +85 c 1 2 3 4 5 6 1 operation assurance range operating voltage (v) clock operating frequency (mhz) 2345 4.0 2.0 1.3 1.0 0.8 minimum execution time (instruction cycle) ( m s) note: the shaded area is assured only for the mb89821/823.
26 mb89820 series 3. dc characteristics (v cc = v3 = +5.0 v, v ss = 0.0 v, t a = C40 c to +85 c) (continued) parameter symbol pin condition value unit remarks min. typ. max. h level input voltage v ih p00 to p07, p10 to p17, p20 to p25, p30 to p33, p40 to p45 0.7 v cc *1 v cc + 0.3 *1 v v ihs rst , mod0, mod1, int0, sck, si, pwc/int1 0.8 v cc v cc + 0.3 v l level input voltage v il p00 to p07, p10 to p17, p22 to p25, p30 to p33, p40 to p45 v cc C 0.3 0.3 v cc *1 v v ils rst , mod0, mod1, int0, sck, si, pwc/int1 v ss C 0.3 0.2 v cc v open-drain output pin application voltage v d p20 to p25, p00 to p07, p10 to p17 v ss C 0.3 v cc + 6.0 v p00 to p07 and p10 to p17 (when selected as ports) for the mb89821/823, and p20 to p25 without pull-up resistor h level output voltage v oh p40 to p45 i oh = C2 ma 2.4 v l level output voltage v ol1 p00 to p07, p10 to p17, p20 to p25, p40 to p45 i ol = 1.8 ma 0.4 v v ol2 rst i ol = 4 ma 0.4 v input leakage current (hi-z output leakage current) i li1 mod0, mod1, p30 to p33, p40 to p45 0.0 v < v i < v cc 5 m a without pull-up resistor for the mb89821/823 mod0, mod1, p00 to p07, p10 to p17, p30 to p33, p40 to p45 5 m a without pull-up resistor for the MB89P825/pv820 i li2 p00 to p07, p10 to p17, p20 to p25 0.0 v < v i < 6.0 v 1 m a without pull-up resistor for the mb89821/823 p20 to p25 1 m a without pull-up resistor for the MB89P825/pv820
27 mb89820 series (continued) (v cc =v3 = +5.0 v, v ss = 0.0 v, t a = C40 c to +85 c) *1: the input voltage to p00 to p07 and p10 to p17 for the MB89P825/pv820 must not exceed the lcd power supply voltage (v3 pin voltage). *2: the measurement condition of power supply current is as follows: the external clock, open output pins and the external lcd dividing resistor. in the case of the mb89pv820, the current consumed by the connected eprom and ice is not included. *3: for information on t inst , see (4) instruction cycle in 4. ac characteristics. parameter symbol pin condition value unit remarks min. typ. max. pull-up resistance r pull p20 to p25, p30 to p33, p40 to p45, rst v1 = 0.0 v 25 50 100 k w with pull-up resistor common output impedance r vcom com0 to com3 v1 to v3 = +5.0 v 2.5k w segment output impedance r vseg seg0 to seg49 v1 to v3 = +5.0 v 15 k w lcd divided resistance r lcd between v3 and v ss 30 60 120 k w lcd leakage current i lcdl v1 to v3, com0 to com3, seg0 to seg49 1 m a power supply current *2 i cc v cc f c = 5 mhz t inst *3 = 0.8 m s 3.55.0ma mb89821, mb89823, mb89pv820 4.0 6.5 ma MB89P825 i ccs f c = 5 mhz t inst *3 = 0.8 m s sleep mode 1.11.7ma mb89821, mb89823, mb89pv820, MB89P825 i cch t a = +25 c stop mode 0.1 1 m a mb89821, mb89823 0.110 m a mb89pv820, MB89P825 input capacitance c in other than v cc and v ss f = 1 mhz 10 pf
28 mb89820 series 4. ac characteristics (1) reset timing (v cc = +5.0 v 10%, v ss = 0.0 v, t a = C40 c to +85 c) (2) power-on reset (v ss = 0.0 v, t a = C40 c to +85 c) note: make sure that power supply rises within the selected oscillation stabilization time. if power supply voltage needs to be varied in the course of operation, a smooth voltage rise is recommended. parameter symbol condition value unit remarks min. max. rst l pulse width t zlzh 48 t xcyl ns parameter symbol condition value unit remarks min. max. power supply rising time t r 50ms power-on reset function only power supply cut-off time t off 1ms due to repeated operations 0.2 v cc 0.2 v cc rst t zlzh 2.0 v 0.2 v 0.2 v v cc t r t off 0.2 v
29 mb89820 series (3) clock timing (v ss = 0.0 v, t a = C40 c to +85 c) * : duty = p wh /t hcyl , p wl /t hcyl (4) instruction cycle parameter sym- bol pin condition value unit remarks min. typ. max. clock frequency f c x0, x1 15mhz clock cycle time t xcyl 200 1000 ns crystal or ceramic resonator input clock duty ratio* duty x0 30 70 % external clock input clock rising/ falling time t cr t cf 10 ns external clock parameter symbol value (typical) unit remarks instruction cycle (minimum execution time) t inst 4/f c m s t inst = 0.8 m s when operating at f c = 5 mhz 0.2 v cc 0.8 v cc x0 0.2 v cc t cr t cf 0.8 v cc 0.2 v cc x0 x1 x0 x1 t xcyl when a crystal or ceramic resonator is used when an external clock in use open f c f c c 0 c 1 p wh p wl x0 and x1 timing and conditions clock conditions
30 mb89820 series (5) serial i/o timing (v cc = +5.0 v 10%, v ss = 0.0 v, t a = C40 c to +85 c) * : for information on t inst , see (4) instruction cycle. (6) uart timing (v cc = +5.0 v 10%, v ss = 0.0 v, t a = C40 c to +85 c) * : for information on t inst , see (4) instruction cycle. parameter symbol pin condition value unit remarks min. max. serial clock cycle time t scyc sck internal shift clock mode 2 t inst * m s sck ? so time t slov sck, so C200 200 ns valid si ? sck - t ivsh si, sck 0.5 t inst * m s sck - ? valid si hold time t shix sck, si 0.5 t inst * m s serial clock h pulse width t shsl sck external shift clock mode 1 t inst * m s serial clock l pulse width t slsh 1 t inst * m s sck ? so time t slov sck, so 0 200 ns valid si ? sck - t ivsh si, sck 0.5 t inst * m s sck - ? valid si hold time t shix sck, si 0.5 t inst * m s parameter symbol pin condition value unit remarks min. max. serial clock cycle time t scyc sck internal shift clock mode 2 t inst * m s sck ? so time t slov sck, so C200 200 ns valid si ? sck - t ivsh si, sck 0.5 t inst * m s sck - ? valid si hold time t shix sck, si 0.5 t inst * m s serial clock h pulse width t shsl sck external shift clock mode 1 t inst * m s serial clock l pulse width t slsh 1 t inst * m s sck ? so time t slov sck, so 0 200 ns valid si ? sck - t ivsh si, sck 0.5 t inst * m s sck - ? valid si hold time t shix sck, si 0.5 t inst * m s
31 mb89820 series 0.8 v 2.4 v 2.4 v 0.2 v cc t shix 0.8 v t ivsh 0.8 v cc 0.2 v cc 0.8 v cc sck so si 0.8 v t scyc 0.2 v cc 0.8 v cc t slsh 2.4 v 0.2 v cc t shix 0.8 v cc 0.8 v t ivsh 0.8 v cc 0.2 v cc 0.8 v cc sck so si 0.2 v cc t shsl t slov t slov internal shift clock mode external shift clock mode
32 mb89820 series (7) peripheral input timing (v cc = +5.0 v 10%, v ss = 0.0 v, t a = C40 c to +85 c) * : for information on t inst , see (4) instruction cycle. parameter symbol pin condition value unit remarks min. max. peripheral input h pulse width t ilih pwc/int1 int0 2 t inst * m s peripheral input l pulse width t ihil 2 t inst * m s 0.2 v cc 0.8 v cc t ilih pwc/int1 int0 0.2 v cc t ihil 0.8 v cc
33 mb89820 series n example characteristics 1234567 5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0 v in (v) v cc (v) v ihs v ils t a = +25? v in vs. v cc v ihs : threshold when input voltage in hysteresis characteristics is set to ??level v ils : threshold when input voltage in hysteresis characteristics is set to ??level 0 1.0 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 v cc ?v oh (v) i oh (ma) ?1 2 3 4 5 v cc = 4.0 v v cc = 5.0 v v cc = 6.0 v v cc = 2.0 v v cc = 2.5 v v cc = 3.0 v t a = +25? v cc ?v oh vs. i oh (1) l level output voltage (2) h level output voltage (3) h level input voltage/l level input voltage (cmos input) (4) h level input voltage/l level input voltage (cmos hysteresis input) 0 0.6 0.5 0.4 0.3 0.2 0.1 0 v ol1 (v) i ol (ma) 246810 v cc = 4.0 v v cc = 5.0 v v cc = 6.0 v v cc = 2.0 v v cc = 2.5 v v cc = 3.0 v 13579 t a = +25? v ol vs. i ol 1234567 5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0 v in (v) v cc (v) t a = +25? v in vs. v cc
34 mb89820 series (5) power supply current (external clock) (6) pull-up resistance 1 5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0 i cc (ma) v cc (v) 23456 7 f c = 4.2 mhz f c = 3 mhz f c = 1 mhz f c = 5 mhz t a = +25? i cc vs. v cc 1 1.5 1.4 1.3 1.2 1.1 1.0 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 i ccs (ma) v cc (v) 23456 7 f c = 4.2 mhz f c = 3 mhz f c = 1 mhz t a = +25? f c = 5 mhz i ccs vs. v cc 1234567 1,000 r pull (k w ) v cc (v) 500 100 50 10 t a = +25? t a = +25? r pull vs. v cc
35 mb89820 series n instructions execution instructions can be divided into the following four groups: ? transfer ? arithmetic operation ? branch ?others table 1 lists symbols used for notation of instructions. table 1 instruction symbols (continued) symbol meaning dir direct address (8 bits) off offset (8 bits) ext extended address (16 bits) #vct vector table number (3 bits) #d8 immediate data (8 bits) #d16 immediate data (16 bits) dir: b bit direct address (8:3 bits) rel branch relative address (8 bits) @ register indirect (example: @a, @ix, @ep) a accumulator a (whether its length is 8 or 16 bits is determined by the instruction in use.) ah upper 8 bits of accumulator a (8 bits) al lower 8 bits of accumulator a (8 bits) t temporary accumulator t (whether its length is 8 or 16 bits is determined by the instruction in use.) th upper 8 bits of temporary accumulator t (8 bits) tl lower 8 bits of temporary accumulator t (8 bits) ix index register ix (16 bits)
36 mb89820 series (continued) columns indicate the following: mnemonic: assembler notation of an instruction ~: number of instructions #: number of bytes operation: operation of an instruction tl, th, ah: a content change when each of the tl, th, and ah instructions is executed. symbols in the column indicate the following: ? C indicates no change. ? dh is the 8 upper bits of operation description data. ? al and ah must become the contents of al and ah immediately before the instruction is executed. ? 00 becomes 00. n, z, v, c: an instruction of which the corresponding flag will change. if + is written in this column, the relevant instruction will change its corresponding flag. op code: code of an instruction. if an instruction is more than one code, it is written according to the following rule: example: 48 to 4f ? this indicates 48, 49, ... 4f. symbol meaning ep extra pointer ep (16 bits) pc program counter pc (16 bits) sp stack pointer sp (16 bits) ps program status ps (16 bits) dr accumulator a or index register ix (16 bits) ccr condition code register ccr (8 bits) rp register bank pointer rp (5 bits) ri general-purpose register ri (8 bits, i = 0 to 7) indicates that the very is the immediate data. (whether its length is 8 or 16 bits is determined by the instruction in use.) ( ) indicates that the contents of is the target of accessing. (whether its length is 8 or 16 bits is determined by the instruction in use.) (( )) the address indicated by the contents of is the target of accessing. (whether its length is 8 or 16 bits is determined by the instruction in use.)
37 mb89820 series table 2 transfer instructions (48 instructions) notes: during byte transfer to a, t ? a is restricted to low bytes. operands in more than one operand instruction must be stored in the order in which their mnemonics are written. (reverse arrangement of f 2 mc-8 family) mnemonic ~ # operation tl th ah n z v c op code mov dir,a mov @ix +off,a mov ext,a mov @ep,a mov ri,a mov a,#d8 mov a,dir mov a,@ix +off mov a,ext mov a,@a mov a,@ep mov a,ri mov dir,#d8 mov @ix +off,#d8 mov @ep,#d8 mov ri,#d8 movw dir,a movw @ix +off,a movw ext,a movw @ep,a movw ep,a movw a,#d16 movw a,dir movw a,@ix +off movw a,ext movw a,@a movw a,@ep movw a,ep movw ep,#d16 movw ix,a movw a,ix movw sp,a movw a,sp mov @a,t movw @a,t movw ix,#d16 movw a,ps movw ps,a movw sp,#d16 swap setb dir: b clrb dir: b xch a,t xchw a,t xchw a,ep xchw a,ix xchw a,sp movw a,pc 3 4 4 3 3 2 3 4 4 3 3 3 4 5 4 4 4 5 5 4 2 3 4 5 5 4 4 2 3 2 2 2 2 3 4 3 2 2 3 2 4 4 2 3 3 3 3 2 2 2 3 1 1 2 2 2 3 1 1 1 3 3 2 2 2 2 3 1 1 3 2 2 3 1 1 1 3 1 1 1 1 1 1 3 1 1 3 1 2 2 1 1 1 1 1 1 (dir) ? (a) ( (ix) +off ) ? (a) (ext) ? (a) ( (ep) ) ? (a) (ri) ? (a) (a) ? d8 (a) ? (dir) (a) ? ( (ix) +off) (a) ? (ext) (a) ? ( (a) ) (a) ? ( (ep) ) (a) ? (ri) (dir) ? d8 ( (ix) +off ) ? d8 ( (ep) ) ? d8 (ri) ? d8 (dir) ? (ah),(dir + 1) ? (al) ( (ix) +off) ? (ah), ( (ix) +off + 1) ? (al) (ext) ? (ah), (ext + 1) ? (al) ( (ep) ) ? (ah),( (ep) + 1) ? (al) (ep) ? (a) (a) ? d16 (ah) ? (dir), (al) ? (dir + 1) (ah) ? ( (ix) +off), (al) ? ( (ix) +off + 1) (ah) ? (ext), (al) ? (ext + 1) (ah) ? ( (a) ), (al) ? ( (a) ) + 1) (ah) ? ( (ep) ), (al) ? ( (ep) + 1) (a) ? (ep) (ep) ? d16 (ix) ? (a) (a) ? (ix) (sp) ? (a) (a) ? (sp) ( (a) ) ? (t) ( (a) ) ? (th),( (a) + 1) ? (tl) (ix) ? d16 (a) ? (ps) (ps) ? (a) (sp) ? d16 (ah) ? (al) (dir): b ? 1 (dir): b ? 0 (al) ? (tl) (a) ? (t) (a) ? (ep) (a) ? (ix) (a) ? (sp) (a) ? (pc) C C C C C al al al al al al al C C C C C C C C C al al al al al al C C C C C C C C C C C C C C C al al C C C C C C C C C C C C C C C C C C C C C C C C C ah ah ah ah ah ah C C C C C C C C C C C C C C C C ah C C C C C C C C C C C C C C C C C C C C C C C C C dh dh dh dh dh dh dh C C dh C dh C C C dh C C al C C C dh dh dh dh dh C C C C C C C C C C C C C C C C C C C C + + C C + + C C + + C C + + C C + + C C + + C C + + C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C + + C C + + C C + + C C + + C C + + C C + + C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C + + + + C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C 45 46 61 47 48 to 4f 04 05 06 60 92 07 08 to 0f 85 86 87 88 to 8f d5 d6 d4 d7 e3 e4 c5 c6 c4 93 c7 f3 e7 e2 f2 e1 f1 82 83 e6 70 71 e5 10 a8 to af a0 to a7 42 43 f7 f6 f5 f0
38 mb89820 series table 3 arithmetic operation instructions (62 instructions) (continued) mnemonic ~ # operation tl th ah n z v c op code addc a,ri addc a,#d8 addc a,dir addc a,@ix +off addc a,@ep addcw a addc a subc a,ri subc a,#d8 subc a,dir subc a,@ix +off subc a,@ep subcw a subc a inc ri incw ep incw ix incw a dec ri decw ep decw ix decw a mulu a divu a andw a orw a xorw a cmp a cmpw a rorc a rolc a cmp a,#d8 cmp a,dir cmp a,@ep cmp a,@ix +off cmp a,ri daa das xor a xor a,#d8 xor a,dir xor a,@ep xor a,@ix +off xor a,ri and a and a,#d8 and a,dir 3 2 3 4 3 3 2 3 2 3 4 3 3 2 4 3 3 3 4 3 3 3 19 21 3 3 3 2 3 2 2 2 3 3 4 3 2 2 2 2 3 3 4 3 2 2 3 1 2 2 2 1 1 1 1 2 2 2 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 2 2 1 2 1 1 1 1 2 2 1 2 1 1 2 2 (a) ? (a) + (ri) + c (a) ? (a) + d8 + c (a) ? (a) + (dir) + c (a) ? (a) + ( (ix) +off) + c (a) ? (a) + ( (ep) ) + c (a) ? (a) + (t) + c (al) ? (al) + (tl) + c (a) ? (a) - (ri) - c (a) ? (a) - d8 - c (a) ? (a) - (dir) - c (a) ? (a) - ( (ix) +off) - c (a) ? (a) - ( (ep) ) - c (a) ? (t) - (a) - c (al) ? (tl) - (al) - c (ri) ? (ri) + 1 (ep) ? (ep) + 1 (ix) ? (ix) + 1 (a) ? (a) + 1 (ri) ? (ri) - 1 (ep) ? (ep) - 1 (ix) ? (ix) - 1 (a) ? (a) - 1 (a) ? (al) (tl) (a) ? (t) / (al),mod ? (t) (a) ? (a) (t) (a) ? (a) (t) (a) ? (a) " (t) (tl) - (al) (t) - (a) (a) - d8 (a) - (dir) (a) - ( (ep) ) (a) - ( (ix) +off) (a) - (ri) decimal adjust for addition decimal adjust for subtraction (a) ? (al) " (tl) (a) ? (al) " d8 (a) ? (al) " (dir) (a) ? (al) " ( (ep) ) (a) ? (al) " ( (ix) +off) (a) ? (al) " (ri) (a) ? (al) (tl) (a) ? (al) d8 (a) ? (al) (dir) C C C C C C C C C C C C C C C C C C C C C C C dl C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C 00 C C C C C C C C C C C C C C C C C C C C C C C C C C C C dh C C C C C C dh C C C C dh C C C dh dh 00 dh dh dh C C C C C C C C C C C C C C C C C C C C + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + C C C C C C C C C + + C C + + + C C C C C C C C C + + C C C C C C C C C C + + r C + + r C + + r C + + + + + + + + + + C + + + C + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + r C + + r C + + r C + + r C + + r C + + r C + + r C + + r C + + r C 28 to 2f 24 25 26 27 23 22 38 to 3f 34 35 36 37 33 32 c8 to cf c3 c2 c0 d8 todf d3 d2 d0 01 11 63 73 53 12 13 03 02 14 15 17 16 18 to 1f 84 94 52 54 55 57 56 58 to 5f 62 64 65 ? ? c c ? a ? a
39 mb89820 series (continued) table 4 branch instructions (17 instructions) table 5 other instructions (9 instructions) mnemonic ~ # operation tl th ah n z v c op code and a,@ep and a,@ix +off and a,ri or a or a,#d8 or a,dir or a,@ep or a,@ix +off or a,ri cmp dir,#d8 cmp @ep,#d8 cmp @ix +off,#d8 cmp ri,#d8 incw sp decw sp 3 4 3 2 2 3 3 4 3 5 4 5 4 3 3 1 2 1 1 2 2 1 2 1 3 2 3 2 1 1 (a) ? (al) ( (ep) ) (a) ? (al) ( (ix) +off) (a) ? (al) (ri) (a) ? (al) (tl) (a) ? (al) d8 (a) ? (al) (dir) (a) ? (al) ( (ep) ) (a) ? (al) ( (ix) +off) (a) ? (al) (ri) (dir) C d8 ( (ep) ) C d8 ( (ix) +off) C d8 (ri) C d8 (sp) ? (sp) + 1 (sp) ? (sp) C 1 C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C + + r C + + r C + + r C + + r C + + r C + + r C + + r C + + r C + + r C + + + + + + + + + + + + + + + + C C C C C C C C 67 66 68 to 6f 72 74 75 77 76 78 to 7f 95 97 96 98 to 9f c1 d1 mnemonic ~ # operation tl th ah n z v c op code bz/beq rel bnz/bne rel bc/blo rel bnc/bhs rel bn rel bp rel blt rel bge rel bbc dir: b,rel bbs dir: b,rel jmp @a jmp ext callv #vct call ext xchw a,pc ret reti 3 3 3 3 3 3 3 3 5 5 2 3 6 6 3 4 6 2 2 2 2 2 2 2 2 3 3 1 3 1 3 1 1 1 if z = 1 then pc ? pc + rel if z = 0 then pc ? pc + rel if c = 1 then pc ? pc + rel if c = 0 then pc ? pc + rel if n = 1 then pc ? pc + rel if n = 0 then pc ? pc + rel if v " n = 1 then pc ? pc + rel if v " n = 0 then pc ? pc + rei if (dir: b) = 0 then pc ? pc + rel if (dir: b) = 1 then pc ? pc + rel (pc) ? (a) (pc) ? ext vector call subroutine call (pc) ? (a),(a) ? (pc) + 1 return from subrountine return form interrupt C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C dh C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C + C C C + C C C C C C C C C C C C C C C C C C C C C C C C C C restore fd fc f9 f8 fb fa ff fe b0 to b7 b8 to bf e0 21 e8 to ef 31 f4 20 30 mnemonic ~ # operation tl th ah n z v c op code pushw a popw a pushw ix popw ix nop clrc setc clri seti 4 4 4 4 1 1 1 1 1 1 1 1 1 1 1 1 1 1 C C C C C C C C C C C C C C C C C C C dh C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C r C C C s C C C C C C C C 40 50 41 51 00 81 91 80 90
40 mb89820 series n instruction map 0123456789abcdef 0 nop swap ret reti pushw a popw a mov a,ext movw a,ps clri seti clrb dir: 0 bbc dir: 0,rel incw a decw a jmp @a movw a,pc 1 mulu a divu a jmp addr16 call addr16 pushw ix popw ix mov ext,a movw ps,a clrc setc clrb dir: 1 bbc dir: 1,rel incw sp decw sp movw sp,a movw a,sp 2 rolc a cmp a addc a subc a xch a, t xor a and a or a mov @a,t mov a,@a clrb dir: 2 bbc dir: 2,rel incw ix decw ix movw ix,a movw a,ix 3 rorc a cmpw a addcw a subcw a xchw a, t xorw a andw a orw a movw @a,t movw a,@a clrb dir: 3 bbc dir: 3,rel incw ep decw ep movw ep,a movw a,ep 4 mov a,#d8 cmp a,#d8 addc a,#d8 subc a,#d8 xor a,#d8 and a,#d8 or a,#d8 daa das clrb dir: 4 bbc dir: 4,rel movw a,ext movw ext,a movw a,#d16 xchw a,pc 5 mov a,dir cmp a,dir addc a,dir subc a,dir mov dir,a xor a,dir and a,dir or a,dir mov dir,#d8 cmp dir,#d8 clrb dir: 5 bbc dir: 5,rel movw a,dir movw dir,a movw sp,#d16 xchw a,sp 6 mov a,@ix +d cmp a,@ix +d addc a,@ix +d subc a,@ix +d mov @ix +d,a xor a,@ix +d and a,@ix +d or a,@ix +d mov @ix +d,#d8 cmp @ix +d,#d8 clrb dir: 6 bbc dir: 6,rel movw a,@ix +d movw @ix +d,a movw ix,#d16 xchw a,ix 7 mov a,@ep cmp a,@ep addc a,@ep subc a,@ep mov @ep,a xor a,@ep and a,@ep or a,@ep mov @ep,#d8 cmp @ep,#d8 clrb dir: 7 bbc dir: 7,rel movw a,@ep movw @ep,a movw ep,#d16 xchw a,ep 8 mov a,r0 cmp a,r0 addc a,r0 subc a,r0 mov r0,a xor a,r0 and a,r0 or a,r0 mov r0,#d8 cmp r0,#d8 setb dir: 0 bbs dir: 0,rel inc r0 dec r0 callv #0 bnc rel 9 mov a,r1 cmp a,r1 addc a,r1 subc a,r1 mov r1,a xor a,r1 and a,r1 or a,r1 mov r1,#d8 cmp r1,#d8 setb dir: 1 bbs dir: 1,rel inc r1 dec r1 callv #1 bc rel a mov a,r2 cmp a,r2 addc a,r2 subc a,r2 mov r2,a xor a,r2 and a,r2 or a,r2 mov r2,#d8 cmp r2,#d8 setb dir: 2 bbs dir: 2,rel inc r2 dec r2 callv #2 bp rel b mov a,r3 cmp a,r3 addc a,r3 subc a,r3 mov r3,a xor a,r3 and a,r3 or a,r3 mov r3,#d8 cmp r3,#d8 setb dir: 3 bbs dir: 3,rel inc r3 dec r3 callv #3 bn rel c mov a,r4 cmp a,r4 addc a,r4 subc a,r4 mov r4,a xor a,r4 and a,r4 or a,r4 mov r4,#d8 cmp r4,#d8 setb dir: 4 bbs dir: 4,rel inc r4 dec r4 callv #4 bnz rel d mov a,r5 cmp a,r5 addc a,r5 subc a,r5 mov r5,a xor a,r5 and a,r5 or a,r5 mov r5,#d8 cmp r5,#d8 setb dir: 5 bbs dir: 5,rel inc r5 dec r5 callv #5 bz rel e mov a,r6 cmp a,r6 addc a,r6 subc a,r6 mov r6,a xor a,r6 and a,r6 or a,r6 mov r6,#d8 cmp r6,#d8 setb dir: 6 bbs dir: 6,rel inc r6 dec r6 callv #6 bge rel f mov a,r7 cmp a,r7 addc a,r7 subc a,r7 mov r7,a xor a,r7 and a,r7 or a,r7 mov r7,#d8 cmp r7,#d8 setb dir: 7 bbs dir: 7,rel inc r7 dec r7 callv #7 blt rel l h
41 mb89820 series n mask options *1: the oscillation settling time is generated by dividing the oscillation clock frequency. since the oscillation period is not stable immediately after oscillation has been started, therefore, the oscillation settling time in the above list should be regarded as a reference. *2: port selection must be same setting of the segment output selection register of lcd controller. *3: note that, when ports are set, the input voltage value for the port pins are different from those for mask rom products. ports are set by the register setting of the segment output selection register of lcd controller. n ordering information no. part number mb89821/823 MB89P825 mb89pv820 specifying procedure specify when ordering masking set with eprom programmer setting not possible (fixed) 1 pull-up resistors p20 to p25, p30 to p33, p40 to p45 selectable by pin can be set per pin without pull-up resistor 2 power-on reset with power-on reset without power-on reset selectable can be set with power-on reset 3 oscillation stabilization time selection (f c = 5 mhz) *1 approx. 2 17 /f c (approx. 26.2 ms) approx. 2 13 /f c (approx. 1.64 ms) selectable can be set oscillation stabilization time approx. 2 17 /f c (approx. 26.2 ms) 4 reset pin output with reset output without reset output selectable can be set with reset output 5 segment output switching 50 segments: no port selection 49 segments: selection of p17 48 segments: selection of p17 to p16 46 segments: selection of p17 to p14 42 segments: selection of p17 to p10 34 segments: selection of p17 to p10 and p07 to p00 selectable *2 can be set *3 can be set *3 part number package remarks mb89821pfm mb89823pfm MB89P825pfm 80-pin plastic qfp (fpt-80p-m11) mb89pv820cf 80-pin ceramic mqfp (mqp-80c-p01)
42 mb89820 series n package dimensions 80-pin plastic qfp (fpt-80p-m11) C.001 +.002 C0.02 +0.05 +0.20 C0.10 +.008 C.004 lead no. 60 41 61 80 1 40 21 20 nom (.591) ref (.486) 15.00 12.35 .005 0.127 (.012.004) 0.300.10 0.65(.0256)typ 14.000.10(.551.004)sq 16.000.20(.630.008)sq (stand off) (.020.008) (.004.004) 0.100.10 0.500.20 0 10 details of "a" part "a" 1.50 .059 1 pin index 0.10(.004) m 0.13(.005) 1994 fujitsu limited f80016s - 1c - 2 c +0.40 C0.20 +.016 C.008 +0.40 C0.20 +.016 C.008 index typ 4.50(.177) typ 6.00(.236) index area 1.50(.059)typ 1.00(.040)typ typ 1.00(.040) typ 1.50(.059) (.0315.010) 0.800.25 1.20 .047 12.00(.472)typ (.0315.010) 0.800.25 ref 18.40(.724) (.016.004) 0.400.10 1.20 .047 (.016.004) 0.400.10 max 8.70(.343) (.006.002) 0.150.05 11.68(.460)typ 9.48(.373)typ 7.62(.300)typ 0.30(.012)typ (.050.005) 1.270.13 (.713.008) 18.120.20 typ 14.22(.560) typ 12.02(.473) typ 10.16(.400) typ 24.70(.972) (.878.013) 22.300.33 (.050.005) 1.270.13 typ 0.30(.012) index area 18.70(.736)typ (.642.013) 16.300.33 (.613.008) 15.580.20 1994 fujitsu limited m80001sc - 4 - 2 c dimensions in mm (inches) 80-pin ceramic mqfp (mqp-80p-p01) dimensions in mm (inches)
44 mb89820 series all rights reserved. the contents of this document are subject to change without notice. customers are advised to consult with fujitsu sales representatives before ordering. the information and circuit diagrams in this document presented as examples of semiconductor device applications, and are not intended to be incorporated in devices for actual use. also, fujitsu is unable to assume responsibility for infringement of any patent rights or other rights of third parties arising from the use of this information or circuit diagrams. fujitsu semiconductor devices are intended for use in standard applications (computers, office automation and other office equipment, industrial, communications, and measurement equipment, personal or household devices, etc.). caution: customers considering the use of our products in special applications where failure or abnormal operation may directly affect human lives or cause physical injury or property damage, or where extremely high levels of reliability are demanded (such as aerospace systems, atomic energy controls, sea floor repeaters, vehicle operating controls, medical devices for life support, etc.) are requested to consult with fujitsu sales representatives before such use. the company will not be responsible for damages arising from such use without prior approval. any semiconductor devices have inherently a certain rate of failure. you must protect against injury, damage or loss from such failures by incorporating safety design measures into your facility and equipment such as redundancy, fire protection, and prevention of over-current levels and other abnormal operating conditions. if any products described in this document represent goods or technologies subject to certain restrictions on export under the foreign exchange and foreign trade control law of japan, the prior authorization by japanese government should be required for export of those products from japan. fujitsu limited for further information please contact: japan fujitsu limited corporate global business support division electronic devices kawasaki plant, 4-1-1, kamikodanaka nakahara-ku, kawasaki-shi kanagawa 211-88, japan tel: (044) 754-3753 fax: (044) 754-3329 north and south america fujitsu microelectronics, inc. semiconductor division 3545 north first street san jose, ca 95134-1804, u.s.a. tel: (408) 922-9000 fax: (408) 432-9044/9045 europe fujitsu mikroelektronik gmbh am siebenstein 6-10 63303 dreieich-buchschlag germany tel: (06103) 690-0 fax: (06103) 690-122 asia paci? fujitsu microelectronics asia pte. limited #05-08, 151 lorong chuan new tech park singapore 556741 tel: (65) 281 0770 fax: (65) 281 0220 f9703 ? fujitsu limited printed in japan

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